dynamic shift register - traducción al árabe
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dynamic shift register - traducción al árabe

CASCADE OF FLIP-FLOPS SHARING THE SAME CLOCK, IN WHICH THE OUTPUT OF EACH FLIP-FLOP IS CONNECTED TO THE INPUT OF THE NEXT FLIP-FLOP IN THE CHAIN, RESULTING IN A CIRCUIT THAT SHIFTS BY ONE POSITION THE BIT ARRAY STORED IN IT
Shift registers; 74HC595; Shift Register; Shift-register
  • Toshiba TC4015BP{{snd}} dual 4-stage static shift register (with serial input/parallel output)

dynamic shift register      
مسجلات الإزاحة الديناميكية
shift register         
مسجل إزاحة
address register         
IMMEDIATELY ACCESSIBLE WORKING STORAGE AVAILABLE AS PART OF A DIGITAL PROCESSOR
CPU register; Processor registers; General purpose register; General purpose registers; Proccesor Register; Pointer register; General Purpose Register; Register width; Register (computer); Conditional register; Address register; Register (computing); Memory register; CPU registers; General-purpose register; GPR (Processor); GPR (processor); GPR (computer); GPR (Computer); General-purpose registers; SIMD register; Floating-point register; Scratch register; Working register; Vector registers; Register (CPU)
‎ سِجِلُّ العُنْوَان‎

Definición

LFSR
Linear Feedback Shift Register (Reference: IC)

Wikipedia

Shift register

A shift register is a type of digital circuit using a cascade of flip-flops where the output of one flip-flop is connected to the input of the next. They share a single clock signal, which causes the data stored in the system to shift from one location to the next. By connecting the last flip-flop back to the first, the data can cycle within the shifters for extended periods, and in this configuration they were used as computer memory, displacing delay-line memory systems in the late 1960s and early 1970s.

In most cases, several parallel shift registers would be used to build a larger memory pool known as a "bit array". Data was stored into the array and read back out in parallel, often as a computer word, while each bit was stored serially in the shift registers. There is an inherent trade-off in the design of bit arrays; putting more flip-flops in a row allows a single shifter to store more bits, but requires more clock cycles to push the data through all of the shifters before the data can be read back out again.

Shift registers can have both parallel and serial inputs and outputs. These are often configured as "serial-in, parallel-out" (SIPO) or as "parallel-in, serial-out" (PISO). There are also types that have both serial and parallel input and types with serial and parallel output. There are also "bidirectional" shift registers, which allow shifting in both directions: L → R or R → L. The serial input and last output of a shift register can also be connected to create a "circular shift register". A PIPO register (parallel in, parallel out) is very fast – an output is given within a single clock pulse.